The Challenges:
I started out by using the RAM Wizard to create the RAM. I added a "debugging centre" to initialize the RAM with data. However, I was not sure If I was initializing it properlly. So, I used the Wizard again to initilaize it, which worked fine (except for a small mix-up, but I'll get to that later...).
I replaced the PROm with the newly created RAM, and tested it out. It didn't work. I looked at the pins and noticed that I had flipped around the pins (so Q15 was going to Q0, Q14 to Q1, etc.). I flipped the RAM vertically, but this ment that I had to re-arrange the way my MAR and MBR2 were arranged. After flipping these, I had all the pins lined up properlly. So, I ran the processor again; It didn't work.
I slowed down the simulation and noticed that once the second call was made (6004: load the GREG with Memory at 004 --> BBBB), that nothing was getting loaded into GREG. The timing was alright, but BBBB was not being loaded into the BUS at all. After scratching my head for a few minutes, I went back and checked what I had initialized my RAM to. As it turns out, I had missed a line (the second 0000) and this was messing up my test program.
Difficulty Rating (out of 5):
Besides having to deal with the rearranging of lines and how to initialize the RAM, this lab was rather easy. There was nothing too tricky about it.
( 2 out of 5)