The Challenges:
The first thing I had to make for the enhanced PC was a "Add 1" device. This was straight forward, as all it was made of was 12 half adders. The design for the Half Adders was taken from Comp 211:
After that, I went about building the enhanced PC. The design involved a lot of trial and error, but I eventually came across a design that seemed to work.
However, after I had tested this new PC, I realized that I had messed up on a crucial part. While it did increment itself automatically, it did so on the SC0 tick, not the SC1 tick like it is supposed to. Even though this design did work, I decided I should try and implement in the way that we had been taught, so it was back to the drawing board. I decided to create a few devices to simplify my design. I created a "12 way 2x1 MUX", instead of having a 4 and 8 way MUX. This design was very simple, as I just had to combine the two devices.
Adding this device made the schematic for the new enhanced PC much simpler than the old one, and easier to understand. I added an additional 12 way MUX so that the PC could switch between retaining the old value (in the SC0 tick) and adding 1 to its current value (the SC1 tick).
Now that the device was done, it would take a little bit of clock manipulation in order to get it to work properly. I needed the Add 1 device to be switched on, the clock to tick, and then the Add 1 device to be switched off. I added an OR gate to the clock, and a buffer (with a delay of 5) to the ADD_1 line, and the problem was solved.
Final Product:
Difficulty Rating (out of 5):
This lab relied heavily on the previous one, so there were not many new devices to design. However, the logic behind the enhanced PC did invlove some thought, and was not easily discovered.
( 2 out of 5)