The Challenges:
The main challenges in this lab came from designing the generic 12-Bit registers to be used for the PC and MAR. Since Logic Works 4 does not have a pre-made 12-Bit register, I had to combine a 4-Bit and an 8-Bit register. This proved more difficult than it sounds. I first tried combining a 4 and 8 Bit shift register.
The shift registers did not act in the way I wanted them too, so I had to try another approach.
I then designed the register around regular 4 and 8 Bit registers; however, these registers do not have a load or send line, so I had to add on myself. Usiing a 4 and 8 way three-state-device, I was able to add the LOAD and SEND ability.
Unfortunatly, this design in a slight flaw. The registers would continue to load data, even when the LOAD was set to 0. The registers would load up the 3rd, "No State" state. This problem was easy enough to fix. I replaced the three-state-device on the LOAD lines with a 4 way 2x1 MUX and an 8 way 2x1 MUX. Now, when load is set to 0, the registers original state is maintained.
Adding the BUS lines was simple, as was attaching the SC0 line. After that, the lab was finished.
Final Product:
Difficulty Rating (out of 5):
This lab was more difficult than I originally thought; however, once I thought through the problem, it turned out to be rather simple. One and a half MUXs.
( 1 1/2 out of 5)